As traditional silicon scaling has stopped paying dividends for flash-storage density, NAND makers have packed more and more bits into their flash packages by layering more and more sheets of flash memory on top of one another. Today, SK Hynix is joining the elite 96-layer club with its "CTF-based 4D NAND flash." While that "4D" descriptor is purely fluff, the company is in fact producing many-layered charge-trap NAND (as opposed to the floating-gate tech favored by Intel and Micron). Those 96-layer stacks allow the company to pack 512 Gb (64 GB) of TLC flash into a single memory chip.
SK Hynix's 96-layer NAND isn't just about stacks on stacks, though. According to Tom's Hardware's report on the company's Flash Memory Summit presentation, the "4D" technique moves the supporting circuitry for each flash cell under that structure rather than etching it into silicon next to the cell, a technique the company calls "periphery under cell" or PUC. SK Hynix says this move lets it make 30% smaller dies and allows it to produce 49% more bits per wafer compared to the dies that went into its 72-layer, 512-Gb products.
The company also claims 30% higher write and 25% higher read performance from its latest flash, presumably versus that same 72-layer stuff, although the company doesn't say by what metric it measured those figures. SK Hynix further notes that thanks in part to a "multiple gate insulators architecture," its 96-layer flash can operate at I/O rates up to 1200 Mbps at 1.2 V.
Hynix plans to introduce 1-TB SSDs using its 4D flash and in-house controllers later this year. Looking to 2019, the company plans to introduce UFS 3.0 mobile SSDs with this flash in the first half of the year, and enterprise SSDs with this technology in the second half. Hynix also plans to introduce 1-Tb flash packages using 96-layer technology and products using QLC NAND next year.