We know Intel will reveal details of its next-generation CPU architecture this coming Tuesday at IDF, and of course, speculation about what they might have to tell us has begun. Most folks seem to expect an architecture derived from the Pentium M, perhaps modified for better vector math performance. At least, that's what I gather. There is also some talk of a four-issue-wide design.
This guy at the Inquirer, though, has grander ideas. Slowly but surely, he leads us down his rabbit hole, and before you know it, he's argued that the new Intel core will be an in-order VLIW design that uses Transmeta-like instruction translation for each of its 16-or-so cores. The reasons for Apple's switch are, naturally, mentioned with mystical reverence in the making of this argument. His scenario sounds very fancy, but I'm not sure how having the CPU use one (or some) of its cores to translate instructions in software would save die space or improve performance over the current approach. (AMD's Dirk Meyer has said the Opteron's instruction decoding logic takes up 2% of die space.) In other words, I think he's huffing paint.
Still, speculation is fun, especially when it's paired with better branch prediction.
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