AMD spills beans on Seattle’s architecture, reference server

For some time now, the features of AMD’s Seattle server processor have been painted in broad brush strokes. We’ve known since last year about Seattle’s eight ARM Cortex-A57 cores, its 28-nm process geometry, and AMD’s plan to deliver it in late 2014. Seattle was the subject of a live demo in May of this year, when AMD disclosed its plan to market the chip as the Opteron A1100.

The specifics of Seattle’s architecture have, however, remained mostly under wraps until today.

This morning, at the Hot Chips symposium, AMD is filling in most of those missing details. We were treated to an advance briefing last week, where AMD provided previously confidential information about Seattle’s cache network, memory controller, I/O features, and coprocessors. We also got our first glimpse at the chip’s physical architecture, both in simplified “floor plan” form and as an abstracted block diagram:

Left: a “floorplan” of the Seattle die. Right: an abstracted block diagram of the same. Source: AMD.

Well then. Let’s work our way down from the cache, shall we?

Seattle’s eight 64-bit Cortex-A57 cores are arranged in four dual-core modules, each of which shares 1MB of L2 cache. That makes for 4MB of L2 cache in all. The four dual-core modules also have access to an 8MB pool of shared L3 cache, which links up all the cores, coprocessors, memory controller, and I/O. The L2 and L3 caches are 16-way associative with ECC protection, and Seattle’s cache network (which also includes L1 instruction and data caches) is fully coherent, meaning there should be no discrepancies between instances of the same data stored at different levels of the cache.

Moving down to the memory controller, Seattle has dual memory channels that support either DDR3 or DDR4 RAM with ECC protection. Each of these 72-bit channels can accommodate a maximum of two modules (of the RDIMM, SO-DIMM, and UDIMM variety, depending on what hardware makers choose) with a peak transfer rate of 1866 MT/s. In all, each Seattle CPU can address up to 128GB of RAM spread across four 32GB modules.

On the I/O front, Seattle can drive eight Serial ATA 6Gbps ports, two 10Gbps Ethernet ports, and eight lanes of PCI Express Gen3 connectivity. The PCIe connectivity can be laid out in three configurations: with a single x8 controller, with two controllers in an x4/x4 arrangement, and with three controllers in an x4/x2/x2 arrangement. Each controller can operate at Gen1, Gen2, or Gen3 speeds without affecting the speed of the other controllers. The same goes for the SATA ports, which can also support legacy drives capped at 3Gbps or 1.5Gbps speeds.

Seattle features two built-in coprocessors: the System Control Processor (SCP) and Cryptographic Coprocessor (CCP).

The SCP is “effectively a small system-on-a-chip” inside Seattle, to use AMD’s words. It comprises an ARM Cortex-A5 core with its own ROM, RAM, and I/O, including a dedicated 1Gbps “system management port.” The SCP is used to “control power, configure the system, initiate booting, and act as a service processor for system management functions.” Thanks to ARM’s TrustZone technology, the SCP can establish a secure environment that operates independently of the main Cortex-A57 cores. In that respect, the SCP is similar to the Platform Security Processor inside AMD’s Mullins and Beema APUs.

As for Seattle’s Cryptographic Coprocessor, that component is simply an offload engine for encryption, decryption, compression, and decompression workloads. It can accelerate AES, ECC, RSA, SHA, Zlib, and supports “true” random number generation in hardware. It’s also accessible both to the SCP for secure processing and to the main Cortex-A57 cores for non-secure activities.

Left: the Seattle reference server. Right: the reference board inside that server. Source: AMD.

AMD’s advance presentation also includes some dirt on the Seattle reference server. This system features a 1P motherboard tucked inside of a 2U chassis with room for up to eight mechanical hard drives. The board has four DDR3 DIMM slots, two PCI Express slots (with support for either 1×8 or 2×4 lane configs), eight SATA ports, two 10Gbps Ethernet ports, four IĀ²C ports, and two UART ports.

According to AMD, this reference design is “intended to meet the needs of partners,” including both software and hardware vendors. Perhaps some of the first Seattle servers will be based on this design. We’ll find out for sure in the fourth quarter, which is when AMD expects Seattle to become available.

Comments closed
    • ronch
    • 5 years ago

    Not sure if I just missed it, but what about RAS features?

    • Turd-Monkey
    • 5 years ago

    [quote<]The SCP is "effectively a small system-on-a-chip" inside Seattle...[/quote<] ...GET IT?!??!

    • ronch
    • 5 years ago

    Seattle is here!
    Long live AMD servers!
    We will now buy it.

      • chuckula
      • 5 years ago

      I see you’ve really taken the whole Haiku contest to heart.

    • ronch
    • 5 years ago

    If AMD will make Seattle and its future ARM chips available for desktop use (in nice, collectible tin boxes), and if Microsoft puts out a proper (read: none of the crappy Windows 8 UI) Windows OS, and if devs will support this new computing ecosystem, then I can see myself gradually phasing x86 PCs out of my life. (A nightmare for Intel.)

      • tfp
      • 5 years ago

      You not buying x86 is nightmare for Intel?

        • ronch
        • 5 years ago

        Not just me. If enough folks do this it could cause a shock to be felt in Intel HQ.

          • tfp
          • 5 years ago

          To me the odd part is your assume these are chip are even close to what AMD and Intel produce for X86. This is a hard market to break into we’ll see how it goes for ARM chips in general.

            • kalelovil
            • 5 years ago

            In terms of feature set and clock-normalised performance, the ARM A57 core used in Seattle should be very similar to AMD’s Jaguar/Puma core.

            AMD’s Project Skybridge next year should give us as close to an apples-to-apples comparison as we are ever likely to get.

            • derFunkenstein
            • 5 years ago

            And then there’s Broadwell-Y way up above that in a similar thermal envelope.

            • ronch
            • 5 years ago

            Huh? Not sure you understood my posts correctly. I’m talking about desktop deployments. I said it clearly in the first post. And yes, it’ll be a tough uphill battle against x86. That’s quite obvious to anyone who’s been a PC enthusiast for many years. Also, I wasn’t merely talking about Seattle, as I’ve said in my first post. I was referring to Seattle AND future ARM chips from AMD, and if they make them available for desktop use, etc.

            • tfp
            • 5 years ago

            Fortunately x86 looks to be standing still (at least at AMD) so ARM should catch up.

            • ronch
            • 5 years ago

            That’s because Intel has pretty much locked x86 up, and it doesn’t help that AMD is floundering as well. The fewer the competitors or players, the less likely the ISA will movie forward. Not saying x86 will be in a much better position in terms of performance and efficiency though, as Intel has leading edge talent and manufacturing technologies at its disposal few can match.

      • Stonebender
      • 5 years ago

      And what would be the incentive for them to do so? Why would anyone buy into a new desktop architecture that is feature wise and performance wise worse than the existing x86 processors?

    • ronch
    • 5 years ago

    In case some of us don’t realize it, Seattle marks AMD’s return to non-x86 processors. The die has been cast. This marks an interesting milestone for the once-plucky little company that started to gain recognition by merely being a second source for x86 CPUs.

      • DarkMikaru
      • 5 years ago

      Actually I hadn’t realized that at all. Though I’ve been a faithful AMD fan for many years I thought they got their start “copying” Intel’s x86 from day one! Reminds me of several years ago when I was aiming to build my first file server and started looking for the most inexpensive low power option I could find.

      AMD’s Geode peaked my interest..still x86 mind you, but interesting at 1w TDP or something like that.
      However, no one sold boards or the chips, at least to us normal consumers so I had to give up on that dream. I found one or two embedded terminals / thin clients with these but that was about it.

      [url<]http://www.amd.com/en-us/products/embedded/processors/lx[/url<] I guess my other question is...who is this aimed at? Web Servers? Databases? Not really sure what metric ARM processing could excel at over x86. Guess time will tell.

        • highlandr
        • 5 years ago

        I had one of these puppies at one time:
        [url<]http://www.geeks.com/details.asp?invtid=GQ3151[/url<] The Geode was a total piece of crap. Tore it out and put in a Athlon XP-M. Then again, I wasn't interested in power consumption, just usability. (Upped the RAM from the piddly 128MB also.) It ran Server 03 reasonably well when I was done, but it wasn't really the same computer anymore...

          • ronch
          • 5 years ago

          If I’m not mistaken Geode was originally designed by Cyrix. AMD picked it up during Cyrix’s last days or something like that.

            • Waco
            • 5 years ago

            And they were utter POS’es. šŸ™‚

        • ronch
        • 5 years ago

        AMD actually created an ISA of their [url=http://en.wikipedia.org/wiki/AMD_Am29000<] own[/url<].

    • ronch
    • 5 years ago

    Scott, please help AMD here. Migrate the entire TR site to Seattle-based servers.

    OK, just a suggestion.

    • Chrispy_
    • 5 years ago

    I have no interest in ARM servers.

    I have interest in seeing if AMD can stay alive long enough to get a competitive alternative to their existing x86 architecture. It doesn’t have to beat Intel, it just has to remain relevant.

      • DarkMikaru
      • 5 years ago

      Agreed sir!! As many of us have been and probably always will be fine paying 70 to 80% of the price of a competing Intel product as long as we get 70 to 80% of the performance of said Intel product. Or whoever emerges for that matter.

    • ronch
    • 5 years ago

    OK, I know there’s someone who’s bound to ask…

    Can it run Cr…

    Ah, forget it.

      • 200380051
      • 5 years ago

      Will it blend?

      hmm, wait…

        • Milo Burke
        • 5 years ago

        To see how the iPad Mini, Kindle Fire, and Nexus 7 fare in a blender, watch this video: [url<]http://www.youtube.com/watch?v=5MMmLQlrBws[/url<]

          • Wirko
          • 5 years ago

          The best way to tell real hardware (made by Victorinox and the like) from wannabeware.

          • LostCat
          • 5 years ago

          I love you. Good thing it’s temporary.

    • ronch
    • 5 years ago

    I know I have some AMD bias, but I actually find Seattle more interesting than Broadwell. And how. BW is just a die shrink while Seattle breaks new ground. In fairness to both products, BW is interesting because of the 14nm shrink, while Seattle is akin to an ARM-based Bulldozer, and it’s interesting how AMD uses an arrangement that somewhat resembles BD. All in all, kudos to all the engineers at both Intel and AMD for finishing what are essentially mind-boggling projects!

    • ronch
    • 5 years ago

    Just in time for the Broadwell launch, huh? What a coincidence!

    • kalelovil
    • 5 years ago

    I wonder what the top-left large unlabelled shape in the SoC ‘floor plan’ represents.
    Could it be some defective/untested circuitry which will be fixed and enabled in a respin next year (*cough* Beema *cough* Bonaire).

    Whatever happened to the integrated (SeaMicro) Freedom Fabric controller?
    [url<]http://2eof2j3oc7is20vt9q3g7tlo5xe.wpengine.netdna-cdn.com/wp-content/uploads/2014/01/amd-seattle-1.jpg[/url<]

      • shank15217
      • 5 years ago

      They probably will keep that off chip, its wasted silicon for much of the industry.

      • ronch
      • 5 years ago

      [quote<]I wonder what the top-left large unlabelled shape in the SoC 'floor plan' represents.[/quote<] Husshhh!!! That's where they put in all the spytech and NSA support circuits!!!

    • windwalker
    • 5 years ago

    I don’t care at all about this but I do hope they make some money from it so they can afford to design products I will care about.

    • ssidbroadcast
    • 5 years ago

    The overall layout of Seattle is like an elbow macaroni, bent against the waterfront. The entire downtown proper stretches from the waterfront to the I-5 corridor, and is mostly a steep hillclimb. Speaking of I-5, the worst performance bottlenecks in Seattle come from the northbound stretch of I-5 that splits to accommodate multiple exits. One such series of exits narrows to just a single lane.

    Speaking of narrow bandwidth, the Queen Ann core is practically disabled during turbo-peak frequencies. This is because it has only two ways to get into it, and insufficient parking. I’m still waiting for a refresh.

      • divide_by_zero
      • 5 years ago

      Wow, this post has a (presumably) super-limited audience made up of those of us who deal with Seattle’s disastrously bad traffic.

      That being said, this is awesomely spot on. All of the pluses to you sir.

        • ronch
        • 5 years ago

        Yeah. I couldn’t relate, honestly. No offense, ssidbroadcast.

          • ssidbroadcast
          • 5 years ago

          Can’t win em all!

      • chuckula
      • 5 years ago

      Ah.. I didn’t see what you did there.
      Given my knowledge of Seattle, I would have riffed on the title with:
      SOMETHING SOMETHING SOMETHING Starbucks.

        • ssidbroadcast
        • 5 years ago

        The Starbucks are there to increase the Instructions Per Clock.

          • UnfriendlyFire
          • 5 years ago

          But they also add latency. Though I guess that’s insignificant if you don’t have enough bandwidth to handle the flow.

      • tfp
      • 5 years ago

      And just like the traffic reports in Seattle lets not even discuss the bottlenecks on I405. There is also huge delays in all pipelines because of frequent collisions.

        • Flying Fox
        • 5 years ago

        We can also talk about the interconnects between the Seattle and the “other side”, where one of the 2 main arteries is closed every other week, even it is tolled. And all the cheapsakes rushing onto the other one jamming it with traffic as well. Then collisons. šŸ˜®

      • wizardz
      • 5 years ago

      a customer of mine is located just north of Seattle and i recall many times getting stuck at northgate on southbound I-5..just hopingto make it in time to catch a flight out of seatac…

      good times, good times šŸ™‚

      • UnfriendlyFire
      • 5 years ago

      While we’re talking about traffic in terms of CPU, Boston’s Big Dig had a major leakage issue. Not sure if they fixed it.

    • LovermanOwens
    • 5 years ago

    I hope this works out well for team AMD!

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