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GlobalFoundries gears up for the next generations of chip manufacturing

Extreme ultraviolet lithography comes to upstate New York

GlobalFoundries, born out of AMD's manufacturing arm many moons ago, made a statement last year when it served as the sole source for AMD's Ryzen and Epyc CPUs and a wide range of Radeon GPUs.  Now that 14-nm LPP is a mature process, GloFo is looking toward the future at its Fab 8 manufacturing facility in upstate New York. 7-nm Leading Performance, or 7LP, is the company's next major stop on the road towards the limits of silicon, and that process may eventually mark one of the first times we'll see the use of extreme ultraviolet lithography (EUV) in the mass production of semiconductor products.

A small portion of the massive expanse of GlobalFoundries' Fab 8.

EUV has, to put it mildly, proven difficult to implement in any form, much less one suitable for high-volume chip manufacturing. Semiconductor companies have been saying that EUV has been just around the corner for well over a decade, but the practical challenges of delivering that technology have delayed its introduction time and time again. Just one semiconductor-production-tool company in the world, ASML, is even bothering to plumb the depths of making EUV scanners at this stage, and so the fate of the technology is largely tied to whether ASML can overcome the challenges inherent in generating and delivering radiation that straddles the border between ultraviolet light and X-rays.

Unlike the argon-fluoride excimer lasers that power today's 193-mm immersion lithography tools, an EUV scanner has to start with a completely new approach to generate the electromagnetic energy that inscribes the incredibly tiny features of next-generation processes on silicon wafers. Deep within the guts of GlobalFoundries' newly reconfigured sub-fab, droplets of molten tin are converted to a high-energy plasma using laser pulses, generating light with a wavelength of just 13.5 nm.

A cutaway of an ASML EUV scanner. Source: ASML

Instead of refractive lenses made from glass, which would stop that light dead in its tracks, an EUV scanner has to direct that precious source power through a path of reflective mirrors to the wafer—all in a hard vacuum. Even under those conditions, the optics of an EUV scanner are tremendously inefficient. Just a couple percent of the 250 W of EUV source power ultimately ends up at the surface of the wafer itself, and ASML hadn't even been able to meet that 250-W milestone for source power until the middle of last year.

The challenges of EUV lithography don't stop with an exotic light source and a move from refractive to reflective optics, either. Finding a suitable pellicle, the transparent protective layer that prevents debris from settling on reticles (widely referred to as masks) during the production process, remains a vexing challenge. Even in a clean-room environment, protective casings for wafer transport, and a vacuum inside the EUV scanner itself, vanishingly small particles of debris could still settle on an EUV reticle, and with no pellicle to protect it, that debris would become printable on the final wafer.

Some of the challenges facing EUV insertion for high-volume manufacturing. Source: GlobalFoundries

Like everything else in the way of an EUV beam, the pellicle absorbs some of the source power and reduces the amount of light that ultimately makes its way to the wafer. At present, EUV pellicle materials transmit about 78% of the source power from the scanner to the wafer; GlobalFoundries needs transmissivity of at least 88% before it can begin using the technology for high-volume manufacturing.

Even with those challenges, GlobalFoundries chief technology officer Gary Patton and Fab 8 general manager Tom Caulfield are optimistic about the prospects of EUV. The technology won't make or break the production of 7-nm chips, for one. Pinning the fate of an entire process on the capabilities of a single tool just isn't practical when one owns a monster fab that needs to be producing chips around the clock, every day of the year. Instead, the company is qualifying its 7-nm process for both multiple-patterned immersion lithography now and for EUV insertion when the technology is ready. EUV will also only be used for two types of chip features on GloFo's 7-nm process to start with: contacts and vias. Those features don't require a pellicle to print, and they'll still offer some of the cycle-time and reductions in processing steps that make EUV worth pursuing.

Patton notes that this gradual transition is a result of the fact that GlobalFoundries has customers that want to tape out products for 7-nm production this year, and that the company can't simply tell those customers to come back in a year when EUV lithography is ready to roll. Instead, the company can drop EUV in at each layer it feels the tech is ready for, ensure that yields are satisfactory, and begin running wafers through the new production path, a process that Caulfield says will be transparent to the customer. GlobalFoundries will tell its customers that EUV is in use, of course, but its clients won't need to shoulder any of the work involved in the transition from immersion lithography to EUV.

When it's fully armed and operational, the benefit of using EUV will be in work and machine time saved in the fab. A single EUV exposure can replace multiple steps in multi-patterned immersion lithography that cascade beyond a single 193-nm scanner. As one of GloFo's throughput gurus put it to us during our foundry floor tour, increased use of multi-patterning would hammer a wide range of the foundry's equipment, not just lithography tools. By removing multiple patterning from the picture with EUV, for example, GloFo would cut the number of masks needed for contacts and vias from 15 for quad-patterning to just five, a figure that has major implications for cycle time (and, by extension, throughput).

Patton also notes that there could be positive effects on yield from the reduction in wafer-handling associated with each process step. He cautions that every time the company touches a wafer, it risks introducing a defect, and reducing the number of production steps could still have a positive impact on yields despite the complexity and challenges of EUV.