Intel outlines its struggles with 10-nm chip production

On Intel’s most recent earnings call, CEO Brian Krzanich finally admitted what many in the industry have long intuited, understood, or scooped: the company is struggling with its 10-nm process technology, and those struggles are preventing the company from achieving good yields of 10-nm chips.

Krzanich admitted to analysts that the company “bit off a little too much” with its aggressive 2.7x scaling target for the process compared to its 14-nm products. Consequently, Intel says it’s in the process of correcting the yield issues it has identified with its chips. The downside is that those yield issues will apparently require lots of time yet to resolve. Although Krzanich still says Intel is shipping 10-nm products today (although it still isn’t clear to whom), the CEO says volume production of 10-nm silicon will not occur before 2019, and he wouldn’t confirm to analysts whether that production would occur in the first half or second half of that year.

Area trends in Intel process technologies. Source: Intel

As a result, we could be waiting anywhere from six to 18 months for 10-nm silicon to appear in volume—a window that is sure to be deeply unsettling to the company’s manufacturing partners and investors given that 10-nm products have been experiencing delays since 2015, at least.

Krzanich plainly stated that 10-nm yield woes are because of the company’s implementation choices for its next-gen process tech. Intel’s 10-nm process is rather unusual among cutting-edge lithography because of the company’s decision to forgo EUV insertion entirely in favor of multi-patterning with traditional 193-nm deep ultraviolet light sources.

Although Intel has said in the past that it was using self-aligned quad patterning as part of 10-nm production, Krzanich offered the eyebrow-raising prospect that the company has to employ as many as five or six multi-patterning steps to create certain 10-nm features in response to one analyst question.

Krzanich didn’t say whether those figures were merely examples of multi-patterning in general or specific examples of steps needed to produce Intel 10-nm chips, but the sheer number of steps inolved in multi-patterning on that scale could be a major factor in the yield problems that Intel is experiencing. As GlobalFoundries put it to me during our foundry tour earlier this year, every interaction a silicon wafer has with lithography tools increases the chance of a defect, and multi-patterning involves a lot of interactions with those tools as a wafer is shepherded to completion.

In contrast, GlobalFoundries notes that EUV not only allows for more efficient usage of foundry capacity, it also reduces the number of times equipment needs to interact with the wafer. EUV users still face significant challenges of their own regarding yields and defect detection in the masks that will be used to guide light to wafers, but the fact that it broadly reduces the number of steps involved in putting chips on silicon may have positive implications for yields and productivity, all else being equal.

Intel won’t enjoy any of the potential benefits of EUV before its 7-nm process goes into production. Krzanich told analysts that 10-nm will be the last Intel lithography node without EUV insertion, but the company hasn’t announced a timeline for insertion of those tools or when it’ll begin high-volume 7-nm manufacturing. Given the lengthy continued work that 10-nm appears to need before it enters high-volume manufacturing, it’s not at all clear when Intel 7-nm chips will first see the light of day.

The toil on 10-nm appears necessary for transitions to future nodes, as well. Krzanich told analysts that the company plans to stay the course on 10-nm so that it can glean the knowledge it needs to effectively make 7-nm silicon, rather than throw away the work it’s already invested in 10-nm production and jump straight to the next process node.

Even with the delays involved in ironing out yield issues, the 10-nm silicon slated to arrive in 2019 will still be of the first-generation variety—not the “10-nm+” transistors that seem poised to finally outperform those available from the ultimate n-plus variants of the evergreen 14-nm process. The CEO told analysts that the improvements going into 10-nm at the moment are mostly focused on yield improvements for the base process, not the performance gains offered by a 10-nm+ variant.

 

To EUV or not to EUV

Going by the publicly-available information, GlobalFoundries’, TSMC’s, and Samsung’s 7-nm processes will all have feature sizes and density broadly similar to Intel’s 10-nm proccess, and they’ll all use EUV tools for critical layers at some point within their life cycles. GlobalFoundries will use EUV for contacts and vias first before laying down critical features with that exotic radiation, while Samsung will go whole-hog on critical features from the get-go.

A cutaway of an ASML EUV scanner. Source: ASML

TSMC is using a more Intel-like approach for its initial 7-nm technology, called N7. According to information gathered by WikiChip, TSMC’s initial 7-nm process still uses self-aligned quad-patterning with a 193-nm light source. Anandtech had an opportunity to go deep on TSMC’s next-generation technologies, and it reports that the company is saving EUV for a next-generation process called N7+.

N7+ will introduce EUV at critical layers, and unlike GlobalFoundries’ 7LP, that transition will not be transparent to the companies using it. Anandtech says that some redesign work will be required for N7+, as it will not only offer performance improvements but also density improvements—and require routing changes—compared to N7.

In fairness, Samsung and GlobalFoundries’ 7-nm processes are by most accounts not set to ramp until later this year, so it’s too early to say whether those companies will experience their own yield headaches from their next-generation lithography tech. In its latest earnings call, however, TSMC claims that its N7 process has already been used to fabricate 18 separate products with “good yield and performance,” and that it is already using that process for volume production. Even allowing for some margin in the meaning of “good yield,” that fact would suggest TSMC has overcome the challenges of laying down the infinitesimal features of its 7-nm parts even without EUV tools.

If TSMC’s description of the state of its process tech is true, and its first 7-nm chips begin appearing in retail products at any point this year, it would likely mark the end of Intel’s long-touted process advantage over foundry competitors. Broadly speaking, TSMC N7 has a contacted poly pitch, minimum metal pitch, and SRAM bitcell density similar to Intel’s 10-nm process, according to Wikichip. GlobalFoundries’ 7-nm process is similarly dense. Those two developments would give Intel competitors like AMD, Nvidia, and perhaps even Apple a much more even playing field with Intel’s fabs as they implement their next designs in silicon.

What’s worse for Intel is that its pure-play foundry competition is not standing still. TSMC already says that it’s seeing similar yields and “tighter distributions of electrical parameters” from its N7+ follow-on with EUV, that it has customers asking to tape out products on N7+ in the second half of 2018, and that volume production of N7+ chips will begin in 2019. If N7+ holds to its claimed 10% to 20% density improvements, a pure-play foundry could even have an edge on Intel’s fabs next year—an event that would be unprecedented in 21st-century semiconductor production, to my knowledge.

Lakes, lakes all around

In the near term, Intel says that it will continue to refine its 14-nm process and deliver new chips built on the technology. The company touts the fact that it’s already delivered higher-performance transistors as it’s refined 14-nm through its 14-nm+ and 14-nm++ optimizations, and it’s undeniable that the work on those improvements has paid off handsomely in chip families like Kaby Lake Refresh and Coffee Lake.

As a result, it’s a no-brainer that Intel will continue to introduce new chip families built on 14-nm until it gets 10-nm yields in hand. Krzanich revealed that Intel will introduce a new processor family called Whiskey Lake for client PCs later this year. Whiskey Lake could include a long-rumored eight-core CPU for its mainstream sockets. The company also plans to introduce a new family of server parts called Cascade Lake for the data center in the same time frame.

It’s undeniable that Intel still makes many of the highest-performance chips in the industry, and the company seems poised to bring much-needed new blood into markets like graphics processing units. Its earnings call also made it clear that the company is still exploring innovative new methods of heterogeneous chip packaging that would allow it to build different functional blocks of chips on different processes and bring them together using its EMIB technology.

Until Intel has a next-generation process to build its very-highest-performance next-generation chips on, however, it seems as though it’ll be hobbled in its ability to introduce denser chips and new microarchitectures just as the rest of the semiconductor industry is making big strides. The next couple of years could be some of the most interesting yet in chip production as companies chase the very limits of physics, and Intel seems to have its work cut out for it if it wants to stay ahead of the game—presuming the game is still Intel’s to lose.

Comments closed
    • HERETIC
    • 1 year ago

    10nm IN PRODUCTION-Kind of.
    [url<]https://www.anandtech.com/show/12749/first-10nm-cannon-lake-laptop-spotted-online-lenovo-ideapad-330-for-449[/url<]

    • ronch
    • 1 year ago

    So.. In order to advance process node technologies, should Intel start to mimick what GF and TS are doing? That is, be too optimistic in labeling their process techs? 🙂

    • psuedonymous
    • 1 year ago

    More surprising than 10nm being late, is 10nm [i<]being a thing at all[/i<]. InSb substrate continues to be MIA, and Intel's Chalcogenide process is still in early days and only outputting comparatively small and very structurally simple 3DXpoint dies for now.

    • Gadoran
    • 1 year ago

    Intersting discussion in this thread.
    Still i have suspect actual Intel 10nm products doesn’t clock as high like 14nm, simple and plain.

    So actual Intel 10nm silicon is pretty useless to increase the performance of a SKU and their yields struggles are related to the very expensive FIN cutting that is recessary to assure a little gain on present 14nm++, in my knowledge they must to be very high and very thin.
    Very likely they will implement some chemical change to the process to prevent too complex geometries of FINs.

    There is an issue in Tech Report article. Actual Ice Lake is done on 10nm+ right now, so Intel will skip plain 10nm toally, so the latter part of the article is uncorrect.
    Ice Lake will be the first Intel volume product on 10nm(+).

    GloFo will have the same problem obviously and TSMC too for high performance SKUs.

      • Jeff Kampman
      • 1 year ago

      I disagree that there’s an issue with what we wrote. It’s entirely possible that Ice Lake will be fabricated on 10-nm+ and that the first 10-nm chips to arrive in 2019 will be of the non-+ variety. These things are not mutually exclusive. Here’s where I took that from:

      [quote<]Stacy Aaron Rasgon - Sanford C. Bernstein & Co. LLC Hi, guys. Thanks for taking my questions. I wanted to follow up on that 10-nanometer point. So as the volume production pushes out into 2019, given you understand the yield issue supposedly, is this a first half pushout, or does it push out into the second half? And when it actually does ramp, do you think it actually will be the current 10-nanometer process that's shipping, or will that be slipping out to 10-nanometer plus potentially? Brian M. Krzanich - Intel Corp. So I'm just going to correct you. You said that supposedly we have the solutions. We do understand these, and so we do have confidence that we can go and work these issues, Stacy. Right now, like I said, we are shipping. We're going to start that ramp as soon as we think the yields are in line. So I said 2019. We didn't say first or second half, but we'll do it as quickly as we can based on the yield. The last part of your question about whether will it be a 10 or 10-plus-plus or 10-plus I think was your question, the yield improvements that we're making are just that, more focused on yield. So think of them as improvements to the various edge stuff, the lithography stuff, thin cleans (33:54) and things like that in order to really drive the multi-patterning and, in some cases, multi-multi-patterning, where you have four, five, six layers of patterning to produce a feature. It's really about that. They aren't necessarily around performance.[/quote<] Ice Lake could easily be delayed. It seems to be entirely up in the air at this point.

        • Gadoran
        • 1 year ago

        Ummm, reading well it is a no answer from Brian.

        Looks like: it is not 10nm or 10nm+ or 10nm++……it is yields only. No matter the kind of process.

        Anyway time will tell 🙂

      • NoOne ButMe
      • 1 year ago

      the peak clock on 10nm is lower than 14++ per Intel. They said it in a presentation a while back, maybe at their manufacturing day even.

      But that should only effect the peak clocks (right?) and for their large core die, the decrease in power consumption should still let them increase clocks slightly. As they are not even close to the “max clock” region of the process.

        • Gadoran
        • 1 year ago

        My bet the future will be a coexistence between 14nm and 10nm depending on SKU.

        Sure in a server die a non stellar turbo will be more than acceptable with an higher base speed thanks to the lower power consumption.
        In desktop the thing is more complex !!. In laptop some light power SKUs are less turbo dependant, other top of the line cpus are more turbo focused.

        A lot of speculations ??? :)…the informations are very scarce 🙁

    • gregzeng
    • 1 year ago

    Few (none?) have commented about Samsung & other rivals in this technology race. For the seniors here, we were wondering if USA-based AMD were able to challenge USA-based Intel. AMD did some non-Intel ventures, such as trying to overcome the N-I-H (not invented here) patterns common to most “corporate cultures”.

    Now we are witnessing the non-USA corporate cultures trying to better the technological progress of the USA. These also-ran corporate systems have been so xenophobic that their fear of innovation has stifled all other innovations. Also-rans: England, Russia, Germany, Europe, Japan, Singapore, Taiwan, South Korea, …

    China, the “greatest threat” in the eyes of some first-world peoples, are now trying to catch up. My understanding of human ergonomics suggests that they will also fail; too much xenophobia, again.

    This article on Tech Report, and many more before & after this will eventually reach the conclusion: human-factors “laws” are hindering further evolution of this species. Until the xenophobia inherent in their cognition systems are understood, humans need DARPA-type warfare systems, to try to overcome their inbuilt xenophobic craziness.

      • Jeff Kampman
      • 1 year ago

      ok

      • Srsly_Bro
      • 1 year ago

      If you think it is as simple as xenophobia, then you have little understand. You don’t understand evolution and you should read up on the topic to not sound especially ignorant.

      • steelcity_ballin
      • 1 year ago

      Subreddit simulator has become self aware and left the confines of reddit. Be afraid. Be very afraid.

      • EndlessWaves
      • 1 year ago

      ARM is an also-ran?

    • Srsly_Bro
    • 1 year ago

    After living in the pnw I’ve been or heard of many of the places that ended up as code names, but I’m not sure about all these lakes.

      • Mr Bill
      • 1 year ago

      [url=https://www.youtube.com/watch?v=zmGbhrHvtFU<]It's Always Colder by the Lake[/url<]

        • HERETIC
        • 1 year ago

        Only in warm weather-When it’s cold the opposite is true.

    • Gastec
    • 1 year ago

    Moore’s “Law” is the observation made by in 1965 Gordon Moore, the [i<]co-founder[/i<] [i<]of[/i<] [i<]Intel[/i<]. "A negative implication of Moore's law is [b<]obsolescence[/b<], that is, as technologies continue to rapidly "improve", these improvements may be significant enough to render predecessor technologies obsolete rapidly...obsolescence may sometimes be desirable to a company which can [b<]profit[/b<] [b<]immensely[/b<] from the regular purchase of what is often expensive new equipment instead of retaining one device for a longer period of time. Those in the industry are well aware of this, and may utilize [b<]planned[/b<] [b<]obsolescence[/b<] as a method of increasing profits."

    • tipoo
    • 1 year ago

    It’s so strange, growing up Intels fabrication process lead was always as fundamental a law as earths gravity, now they may finally, for once, be overtaken.

    I expect things to only flatten out from there with the competition as everyone faces the same issues scaling silicon, unless Intels R&D punches them through to another material faster.

    • chuckula
    • 1 year ago

    It’s funny how there’s this assumption that Intel can’t compete with anybody when they’re all on the same process node.

    It shows a lack of understanding of history considering that once upon a time you had AMD Phenom processors [url=https://techreport.com/review/13633/amd-phenom-processors<]on a 65nm process that launched in 2007[/url<] going up against.. Core 2 processors on a 65nm process. The 45nm Wolfdale die shrinks didn't launch until the next year. Then in 2011 you had [url=https://techreport.com/review/21813/amd-fx-8150-bulldozer-processor<]Bulldozer on 32nm[/url<] that launched the same year as Sandy Bridge on 32nm. For some reason, Intel didn't go bankrupt.

      • Jeff Kampman
      • 1 year ago

      Thing is, we’re at a point now where single-core performance gains appear more or less tapped out. Intel was a much more dynamic target for AMD from 2008 to 2018. Whether because of limits of processor design or these process delays or both, AMD has a much more stable performance target to chase and it appears to have figured out the building blocks for a competitive x86 core with long enough legs to rekindle its competitive ambitions for the next few years.

      Intel will doubtless remain competitive (and a leader) in this new environment, but it won’t be with the same breezy progress that marked the Core 2/Nehalem/Sandy years. Nobody would argue that Intel is going away, just that the competition is going to get a lot tougher.

        • blastdoor
        • 1 year ago

        Plus, AMD now gets to benefit from the massive R&D and capital investments that the foundries have made using profits from mobile. That is a night and day difference compared to the times when AMD had to build its own fabs.

        Of course, there are benefits from being fully integrated as Intel is. So it is of course not the case that Intel is going out of business or anything dramatic like that – – that is just a straw man. However, Intel’s profit margins are almost certainly going to drop quite a bit over the next couple of years. They are going to be a more normal company. First among equals, not hegemon.

      • Antimatter
      • 1 year ago

      True. While Intel has traditionally had the ‘best’ process by introducing new features like HKMG and FinFETs before others its never had a substantial density advantage over its competitors.

        • Spunjji
        • 1 year ago

        Going back a little further their 90nm process started off as a veritable barrel of arse compared with AMD’s, mostly due to materials choice IIRC. Didn’t stop them selling what were then measurably inferior CPUs by the truckload.

        It’s not all about having the best tech really, so much as how you wrap it up with services, third-party buy-in and *cough* marketing funds *cough*.

        *edit* Got a few fans of Press-hot around here it seems! Seriously people, I’m not pulling this out of my backside – go look up the power characteristics of Intel’s leading 90nm CPUs. It was a shocker.

        • Action.de.Parsnip
        • 1 year ago

        I *think* they always had the most dense and fastest srams (cache memory) at any given node.

          • Antimatter
          • 1 year ago

          I’m not denying that Intel may have had modestly denser nodes than others. However in recent years Intel has claimed that they are a whole generation ahead of their competitors in density.

      • NoOne ButMe
      • 1 year ago

      Into bas almost always had one or both:
      1. Better process
      2. Better architecture.

      Th exception is in the server market when Core 2 launched. Where AMD’s IMC to Intel’s FSB meant AMD was fairly competitive in many server oriented tasks.

      • Spunjji
      • 1 year ago

      Where’s that assumption coming from? I actually haven’t seen it made here. If it were then I’d agree with you, it’s patently false. Intel can sell whatever they make, superior or not, and design-wise they still have a lead even if they lose the manufacturing edge.

      • Klyith
      • 1 year ago

      [quote<]For some reason, Intel didn't go bankrupt.[/quote<] ...so what you're saying is that AMD should look forward to another billion-dollar payout from a new antitrust lawsuit?

      • ptsant
      • 1 year ago

      I believe Intel got much better performance out of their comparable process, even though the theoretical node size was the same. Just because two fabs claim the process resolution doesn’t mean they achieve the same thermal/electrical properties. Maybe experts can add more?

        • Firestarter
        • 1 year ago

        14nm, 10nm, 7nm, these are names not actual sizes. Yes the name has some relation to the minimum size of a feature, but mostly it’s just a name they slapped on whatever new process they’re developing to indicate what kind of density/performance they’re targeting with it. So when two companies say they’re developing on a “10nm” process, the processes themselves can vary in so many ways it would be easier to list the ways in which they’re the same

        not an expert myself either, but I have a family member who is

    • JoeKiller
    • 1 year ago

    Intel rode the Pentium architecture way longer than needed until the K7 lit a fire and we got the core architecture that dominated for about 10 years. Hopefully this is the same situation and they get it together.

      • Jeff Kampman
      • 1 year ago

      This isn’t an architectural problem—Intel likely has a number of next-generation products taped out for 10-nm that it can’t make profitably, if it can make them at all. Architectural teams can make all the designs they want but the manufacturing group has to be able to build them.

        • NTMBK
        • 1 year ago

        Intel could have backported those designs to 14nm++, if they had realised that 10nm was going to be this badly delayed. I wonder what went wrong- were upper management too trusting of the fab’s estimates?

          • cygnus1
          • 1 year ago

          I don’t think it’s hard to believe the executives were drinking plenty of the Intel koolaid. But, since they don’t appear to have a short term backup plan for these delays, if they don’t have an explosion of amazing things shortly after figuring out 10nm and then EUV, the board and/or shareholders will be putting C suite folks on the street, I’m sure.

          • Jeff Kampman
          • 1 year ago

          My understanding is that microarchitectural implementations and the processes they’ll be fabbed on are far too intertwined these days to allow for a “backporting” of any kind. You can’t just take a chip that was designed with certain key assumptions about the underlying transistors and logic (e.g. timing, critical paths, die area, transistor budget, etc.) and put it on a less-dense process with different transistors, design rules, and timing characteristics.

          Even if none of that were true, starting an entirely new uarch on 14-nm would be a concession that 10-nm was troubled and I imagine that would be a very difficult pill to swallow for a company that prides itself on its fab prowess like Intel.

            • NoOne ButMe
            • 1 year ago

            I think rather, the Cost Benefit Analysis was that the cost to backport was not worth it.

            Adding more cores versus porting an architecture….

            I will note, I think it was hotchips, but I recall an Intel presentation (by engineers, not marketing) talking about how even their “easy” Ticks (shrink) had like 80-90% of the chip redone in the shrink.

            • psuedonymous
            • 1 year ago

            That, and they could end up spending a year or two redesigning the architecture for 14nm, just in time for 10nm to start rolling out and having wasted a bunch of money, and a bunch of engineers’ valuable time.

            • Kougar
            • 1 year ago

            Fair point. Looking back at history AMD and NVIDIA’s “backporting” attempts with new GPUs when fab shrinks became delayed were either disastrous or simply didn’t go well.

            That said Intel hasn’t been offering much, if any raw IPC increases even before the 10nm shrink became delayed. “Core” is pretty long in the tooth, and simply adding many “Cores” together has an inevitable conclusion Intel is fast approaching. More than a few respectable websites have already begun theorycrafting that CPUs can’t advance appreciably further in their present incarnation.

            It also seems Intel itself grew too overconfident in its fabrication superiority. Early Intel slides indicating 10nm sampling by 2015 still exist, but there are plenty of others Intel probably [url=https://www.kitguru.net/wp-content/uploads/2014/07/intel_tech_lead-1024×724.png<]would take back[/url<]. Particularly [url=https://static.seekingalpha.com/uploads/2014/1/14/8857901-1389712039386434-Michael-Blair_origin.png<]this one[/url<]

            • tipoo
            • 1 year ago

            Unless you’re Nintendo and for some reason decide to go through the painstaking process to port a PowerPC 750 to a modern fabrication node because you’re run by alien squids and we humans can’t decipher your reasons.

    • NTMBK
    • 1 year ago

    Man, that headline image is just painful to look at. Hundreds of CPUs written off in a second. Had to go find the video that came from: [url<]https://www.youtube.com/watch?v=bB5iWzsztdc[/url<]

    • Tristan
    • 1 year ago

    lol, they stuck with sixtuple patterning, no wonder this takes that long.
    Why they rejected EUV ? They are pionier in manufacturing, and invested few bilions into ASML to speed up EUV progress. EUV tools are now mass produced, so they are production worthy. Even if they overcome these hurdles, then their 10nm will be very shortlived, and btw very coastly.

      • Jeff Kampman
      • 1 year ago

      It’s really not accurate to say Intel “stuck with” quad-patterning or even more complex lithography when that technique was likely the only method that was available back in the pre-2015 days when 10-nm was being developed. EUV scanners are only nearing production readiness today and practical scanners using that light source were likely nowhere near ready four to six years ago.

      Intel likely figured it would be transitioning to a leadership 7-nm process in this time frame. Had things gone according to plan, Intel would have been poised for EUV insertion around the same time the foundries were, just on a denser node. Obviously that hasn’t come to pass, but Intel clearly feels that it needs to sort 10-nm with 193-nm light sources instead of just jumping to 7. I’m not privy to the proprietary reasons as to why.

        • Spunjji
        • 1 year ago

        I am /very/ curious about those reasons. Externally it doesn’t look like the best possible move, as compared with a TSMC-style ditch-and-run to the next node, so I imagine they must be pretty compelling.

          • just brew it!
          • 1 year ago

          Moving to EUV will be time-consuming and costly. They’ve already got a lot invested in adapting the existing process tech to 10nm. Those two factors taken together are probably reason enough.

            • willmore
            • 1 year ago

            Sunken Costs fallacy.

        • TwistedKestrel
        • 1 year ago

        Jeff, you’ve given some good insights in the comments – you might consider compiling them into the original article, or a new one

        • psuedonymous
        • 1 year ago

        [quote<]I'm not privy to the proprietary reasons as to why.[/quote<]Even with EUV, multipatterning is going to be needed for future smaller Silicon nodes. Choices are to tackle severe multipatterning with the well-understood DUV equipment and then transition to EUV when everyone else irons out all the bugs and second/third gen equipment starts becoming available (and someone has solved the Pellicle problem, new optics result in less power loss, etc); or to switch to EUV for an 'easy' first-gen process scaling, and then tackle multipatterning while also tackling rollout of the new equipment.

      • Stonebender
      • 1 year ago

      What makes you think they rejected EUV? They’ve had EUV scanners in D1D/D1X at least since 2012. EUV simply isn’t ready yet, though from talking to ASML engineers it’s sounding like they’re getting close.

    • just brew it!
    • 1 year ago

    I have to wonder what’s going to happen once we switch over to EUV and move to 7-nm and smaller processes. At that point the circuit features are just a couple dozen atoms across, and I imagine random bitflips (due to quantum effects and ambient radiation) start to become significant. How much die area will need to be devoted to additional redundancy and ECC logic to guard against this, and at what point does that nullify the benefit of going to smaller process geometries?

      • Aranarth
      • 1 year ago

      I’m not sure why, but I think whisky lake will be become your next favorite intel chip! 😀

        • just brew it!
        • 1 year ago

        While I do enjoy a little whiskey now and then, beer is still my alcohol of choice. Whiskey Lake has a nicer ring to it than Beer Lake, I suppose. 😉

        Lager Lake could work. Or if we want to get even more specific with the beer styles, Pilsner Lake, Helles Lake, Bitter Lake, or Porter Lake…? 😀

          • Anovoca
          • 1 year ago

          Louie Lake?

          • K-L-Waster
          • 1 year ago

          Stout Lake has a nice ring to it…

          • NTMBK
          • 1 year ago

          Special Brew Lake

          • Aether
          • 1 year ago

          Wee Heavy Lake?

          • sluggo
          • 1 year ago

          When I drink too much beer, IPA Lake!

      • Anovoca
      • 1 year ago

      would it ever really nullify the benefit completely. I would imagine the spacing out effect, even if the actual die sized remained the same dimensions, would increase cooling capabilities my reducing density.

        • just brew it!
        • 1 year ago

        The additional logic to facilitate the error correction/detection is going to dissipate power too.

      • caconym
      • 1 year ago

      laptops made of lead to inhibit cosmic rays

        • just brew it!
        • 1 year ago

        Good luck selling those in California or Europe…

          • NoOne ButMe
          • 1 year ago

          For California, just call it an “all organic” laptop.

          After all, we have idiots buying “raw” water..

    • tsk
    • 1 year ago

    Excellent article Jeff.

    I figure Intel still holds a lead in manufacturing and I doubt TSMC’s 7nm can produce anything but small ARM chips for a long time.

      • Jeff Kampman
      • 1 year ago

      I bet Nvidia has a deep-learning chip taped out to the reticle limit ready to prove us wrong.

        • ptsant
        • 1 year ago

        With a $100K sticker price, as all trendy things that do deep learning.

        • the
        • 1 year ago

        I’m not sure I’d make that bet as nVidia recently published a paper about using multiple smaller does on an interposer to act as one larger GPU.

      • blastdoor
      • 1 year ago

      How do you define small? Is 5 billion transistors small?

        • chuckula
        • 1 year ago

        Considering Intel just launched a 30 billion transistor FPGA on its obsolete 14nm process…. Yes.

          • blastdoor
          • 1 year ago

          By that definition, Core M must be a cinch to fab. And yet, Intel can’t do it.

            • chuckula
            • 1 year ago

            Well I’d like to see TSMC’s 7nm process produce an 18 core x86 processor that can clock well north of 4GHz in 2018.

            People make the mistake of assuming that because Intel’s 10nm process is not up to [b<]Intel's[/b<] standards that it's not up to everyone else's standards. People tend to be wrong. Speaking of which, 7nm RyZen parts damn well better beat higher-core count 14nm Skylake X's in AVX-512.

            • blastdoor
            • 1 year ago

            Are you suggesting that Intel is fully capable of introducing a 5 billion tramsistor part today at volume on 10nm, but they are holding back until they can do 18 core Xeons?

            That sure wasn’t the standard they used to roll out 14nm.

            • NoOne ButMe
            • 1 year ago

            BS argument. It’s all about money.

            10nm, on the smallest chips Intel makes, isn’t cheaper than 14nm.

            Intel “can’t” just cut it’s margins to release a slower series of CPUs (14++>10 for clocks recall).

            I mean, Intel could. But that’s like saying AMD could launch 7nm Zen2 products in 2018. They could do it. It would be stupid, and probably self-defeating.

            Intel can’t make a <100mm^2 die cheaper on 10nm. What are the odds they can make a 200+mm^2 one cheaper on 10nm?

            (Edit: if it is unclear, I am comparing Intel’s 14nm cost to their 10nm cost)

            • blastdoor
            • 1 year ago

            I think you’re right about the money.

            In mobile, especially as we get smaller than smartphones, process shrinks aren’t so much about lowering the cost of the transistors as they are about improving performance/watt. Apple, Samsung, Qualcomm et al will pay more per transistor if that’s what’s needed to make AR glasses (etc) work. So for the foundries, they have some big customers with deep pockets that will fund these transitions.

            But for Intel? Dell, HP, etc aren’t going to pay those higher prices just to improve battery life in a laptop. Intel’s customers might not be exactly happy with stagnation, but they sure don’t want to see a price hike. So in the short run it makes sense for Intel to refrain from pushing ahead too fast with newer processes.

            Longer term, though, this is really risky for Intel. Now AMD can come along and take advantage of the process investments made by the big mobile players. AMD might get access a year later than the big kids, but they are at no disadvantage relative to Intel (maybe even an advantage).

            • NoOne ButMe
            • 1 year ago

            Per Intel’s word, and this is their word, their costs are still decreasing with node shrinks. So OEMs shouldn’t pay more, given the yield will get up to Intel’s (very high!) standards.

            Also, I don’t think Intel is a year behind. Unless Global Foundries falls behind that far. Before they had IBM’s team under their umbrella I could see that, but with IBM’s process tech completely vertical with GloFo’s past teams, seems unlikely they’ll fall behind [Intel].

            • Spunjji
            • 1 year ago

            Those goalposts moved so fast, all I could see was a blur.

            • blastdoor
            • 1 year ago

            Such is the nature of Calvin ball

            • chuckula
            • 1 year ago

            What moving “goalposts” are we talking about here exactly? Intel has high performance targets and won’t produce 10nm parts until the process is ready to meet those targets.

            Once again: With the “magical” 7nm miracle-node that GloFo is apparently on the verge of launching* it’s quite simple: Given RyZen’s “superior” architecture and GloFo’s “superior” 7nm node, I fully expect to see lower core-count RyZen2’s routinely beating higher core count 14nm [b<]and[/b<] 10nm Intel parts. You know, pretty much like how the 8700K with a 2 core disadvantage over the 2700X still beats it routinely. The diametric opposite should be true for these magical 7nm chips. Overclocking? 5GHz or STFU AMD. It's time to put up or shut up. * Funny how AMD went out of its way to do a RyZen refresh when 7nm parts are practically bursting out of the fab.

            • tsk
            • 1 year ago

            I’m also skeptical of GloFo 7nm. They couldn’t pull off 14nm and had to pay Samsung. I mean I really hope we have 7nm Zen in q1 2019 but I really doubt it.

            • blastdoor
            • 1 year ago

            Skepticism towards GloFo is totally reasonable given the history.

            But…. I actually think they’ll do it. They’ve had more time to get their act together now.

            • Spunjji
            • 1 year ago

            Agreed here. They seem to have turned a corner.

            Look at that 14nm purchase strategically. Technologically speaking it may have been a cop-out, but in business terms it was the best possible choice and it got us Ryzen. What it tells you is they’re willing to put the money in necessary to get the results they need to compete.

            • BurntMyBacon
            • 1 year ago

            If I understand the situation correctly, they bought the IP (14LPE/14LPP)off of Samsung in 2014. Later the same year, they acquired IBM’s microelectronics division (Fabs, personnel, IP including RF processes, but not research). So far, this has netted them a nice update (14HP), an on time 12LP, and an RF capable 12FDX . It is reasonable to assume they are better off than they were.

            Going forward, their 7nm process is no longer the work of just Global Foundries engineers, but includes IBM’s IP, methods, and talent. I don’t know how much (if any) of Samsung’s IP will remain, though as even their 14HP process leans pretty heavily towards the 14nm SOI process IBM developed prior to selling their microelectronics division.
            [url<]https://ieeexplore.ieee.org/abstract/document/7046977/?reload=true[/url<] I'll adopt a cautiously optimistic stance, but won't be too surprised if things don't work out quite as planned.

            • Spunjji
            • 1 year ago

            You’re changing your definition of acceptable based on which company you’re talking about. Those are the goalposts I mean.

            We’re comparing non-existent 10nm products with non-existent 7nm products. You’re saying that there’s no reason to suppose that 10nm is going to fail entirely on the basis that they are producing small quantities of small chips with it (which is fair), then dissing GloFo’s 7nm on the basis that it’s not churning out 18-core monstrosities.

            I get that you’re fighting a war against perceived fanboyism, but when you take that tack against a reasonable perspective it makes you look a bit mad.

            Incidentally the 8700K – as far as I have seen – does /not/ routinely beat the 2700X in anything that actually uses all of those cores. It routinely wins where IPC is the determining factor , though, which is honestly no surprise given that it’s the 8th iteration of its architecture and built on a roundly superior process node.

            • chuckula
            • 1 year ago

            [quote<] You're changing your definition of acceptable based on which company you're talking about. [/quote<] Uh.. yeah moron. Do you think TSMC would be in such a headlong rush to get to it's "7nm" process if it was already fabbing 30 billion transistor chips using Intel's 14nm process right now? Incidentally, that's 43% more than the insane GV100 chips, so TSMC's jump to "7nm" is more a catchup operation than a victory over Intel. Do you think AMD would be so eager to wait until 2019 to produce a piece of silicon that -- for the first time in AMD history -- will have more than 8 cores on it if AMD was already using Intel's 14nm process that produces 28 core chips right now? Of course it's all dependent upon the company, and it clearly shows how little you know that you think this is "moving the goal posts".

            • blastdoor
            • 1 year ago

            So…. their lack of complacency is their weakness?

            What was it that Andy Grove always said — “only the complacent maximize gross margins”?

            • Srsly_Bro
            • 1 year ago

            Dang Chuck. You went pretty hard on the boy.

            • Anonymous Coward
            • 1 year ago

            Actually regarding AMD has having “only” 8 cores per die, I think it was a brilliant move, allowed one die to scale. They can’t afford a special die for servers.

            • blastdoor
            • 1 year ago

            Agreed — I think it’s an admirably pragmatic solution.

            • the
            • 1 year ago

            TSMC is able to go north of 4 Ghz with the Fujitsu’s SPARC64 XII on 20 nm. It seems feasible that the more refined 7 nm process would be capable of such clock speeds with a similar design.

            • Action.de.Parsnip
            • 1 year ago

            Going quick is a great deal about process design decisions; 15+ layers, big thick power lines and critical paths and doing away with things like DVFS. It’s part of how IBM get their chips to go so fast.

            • the
            • 1 year ago

            Indeed. Fujitsu made those choices with their designs and TSMC’s foundries. Point being is that if you want to click high, TSMC is an option but you have to design your architecture to do it.

            • chuckula
            • 1 year ago

            Yeah, and you do realize that since Dennard scaling has gone away it’s [b<]easier[/b<] to reach clockspeeds like that on older processes than it is on newer ones right?

        • tsk
        • 1 year ago

        Sub 10W parts.

      • chuckula
      • 1 year ago

      You’re being downthumbed for going against the Intel hatefest but history says you are right.

      [url<]https://techreport.com/news/28662/tsmc-begins-volume-production-of-16-nm-finfet-chips[/url<] It was a year after that announcement that we started to see products.

        • blastdoor
        • 1 year ago

        No, we saw the products a few the months later. The Apple A9 came out in the iPhone 6+ in September of 2015. The article you linked to was July 2015.

          • chuckula
          • 1 year ago

          I don’t count toys.

            • blastdoor
            • 1 year ago

            Toys like Core M?

            So Intel didn’t really have a 14 nm process until 18 core Xeons were shipping?

            • Goty
            • 1 year ago

            Remember when Intel tried to make “toys?” That didn’t go so well, did it?

            • tipoo
            • 1 year ago

            Those toys spend as much if not more die area/transistors than Intel Y or U series chips these days. Smells like “I don’t like being wrong”.

            • chuckula
            • 1 year ago

            The fact that they are bloated toys does not make them any less toy-like.

            The fact that Intel actually makes a profit from designing and selling actual chips while Apple blatantly makes a loss on the chip but makes profits from vertical integration of selling throw-away landfill products doesn’t make Apple superior.

            • tipoo
            • 1 year ago

            [continues deliberately ignoring the point that large dies shipped on that node when stated]

            I’m not saying any more than that, they’re not disqualified because you think smartphones are toys.

            • Anonymous Coward
            • 1 year ago

            Love that claim that Apple makes it silicon at a loss. Hah.

            • NTMBK
            • 1 year ago

            …how the hell could Apple “make a loss on the chip”? [i<]They don't sell the chip[/i<]. They sell devices.

            • BurntMyBacon
            • 1 year ago

            Not saying I agree or disagree with the loss statement, but they can make a loss on the chip if it cost them more to manufacturer than the allocated budget for the chips in the devices they are used in. Of course, they could just inflate the overall price of the product, but it is possible to hide the cost if other components come in under budget or if Apple decides to subsidize the overall cost of the device to hit a target price. It would be similar to how game console makers routinely subsidize console costs and make up the difference through game licensing.
            Alternate to the loss on a chip theory, they could simply be making less per chip. Intel has very high margins. I think AMD’s margins hover just over half of Intel’s margins. Apple could cut into their margins pretty significantly (relative to Intel) and still be profitable if they so chose. Being vertically integrated allows them even more latitude than normal here.

            • blastdoor
            • 1 year ago

            And I’m pretty sure TSMC isn’t losing money on the chips they sell to Apple.

            Perhaps he would then say that Apple is somehow designing the chips at a loss, but that’s a very strange argument. The design is a fixed cost that gets spread over a very large volume of devices, such that the per-device SOC design cost is very low. And clearly they are making a ton of money on the iPhone.

            I think you’d have to argue that the iPhone would be even more profitable if it used Qualcomm SOCs (or some other off the shelf SOC) rather than Apple’s custom chips. And so relative to that unobserved counterfactual, Apple is “making a loss” by designing their own chips. I guess we’ll never know, but that seems unlikely to me.

            • NoOne ButMe
            • 1 year ago

            Ian’t It obvious?
            The BoM is actually just lost potential sales! Using things in the BoM means they get thrown away!

      • kuttan
      • 1 year ago

      That lead is diminishing that is the whole point. Since Global Foundries 7nm process is expected for mass production with Ryzen 3000 series and Vega 20 next year which they already started sampling, TSMC also into mass production next year. The advantage with Intel manufacturing is almost zero from next year onward.

      • NoOne ButMe
      • 1 year ago

      You mean like the probably 250ish mm^2 Vega 20 chip…?

        • tsk
        • 1 year ago

        I’ll believe it when the product actually launches and we know the die size.

          • NoOne ButMe
          • 1 year ago

          It’s a 484mm^2 die on 14nm. Unless you think it will get near perfect scaling it is 200mm^2+.

          (edit: and if it does scale perfectly, it’ll be something like 190mm^2. Still far larger than the 80-some mm^2 2+2 chips Intel is looking at launching)

          By this standard, Intel has shown exactly zero lead over TSMC. The difference is TSMC is ramping up (likely iPhone Socs) <100mm^2 die fast, and Intel is ramping up small <100mm^2 die (2+2 configuration) more slowly over a longer period of time.

      • Spunjji
      • 1 year ago

      [url<]https://wccftech.com/amd-has-working-7nm-gpus-running-in-labs-sampling-later-this-year/[/url<] You were saying? I mean sure, that's only tests, but given that Intel are still barely able to produce a dual-core SoC for sampling on their 10nm...

        • tsk
        • 1 year ago

        Yeah and Intel had working Ice Lake parts on the 30th of May 2017, doesn’t mean they are shipping soon.

          • Spunjji
          • 1 year ago

          I didn’t say that they would be. My point was that at present there’s literally no reason to suppose that TSMC 7nm will be unable to “produce anything but small ARM chips for a long time” given that, at present, it appears to be at a more advanced stage of development than Intel’s 10nm and already has designs taped-out for large projects.

      • Action.de.Parsnip
      • 1 year ago

      Their 14nm is probably still equal to ‘7nm class’ tsmc or gf. Their manufacturing really is a class apart and when 10nm does eventually drop it will be on another level density wise.

        • tsk
        • 1 year ago

        From what Ive read throughout various chip sources Intels 14nm is roughly the same as TSMC’S and Samsungs 10nm,however those two 10nm processes can’t produce nearly as high wattage and high clocking parts.

          • Action.de.Parsnip
          • 1 year ago

          That’s the whole point these days. The 14nm classification from intel is a higher figure than the 10nm from say TSMC, and twice as high 7nm but in the actual sizes of components/gates/paths whatever that intel 14nm will run rings in most metrics around anything else that calls itself 10nm from another foundry. The nm classification of any non-intel process is more like a ‘pr+’ equivalent figure from the Athlon days.

          Theres a solid reason why 10nm is so troubled because it’s so ambitious vs what anyone else is trying to do (excluding early EUV integration by gf/samsung/tsmc). Whatever drops late this year/early next year calling itself 7nm isn’t anything like 7nm by any standards of definition of a few years ago. It’s just marketing fluff.

        • Spunjji
        • 1 year ago

        The latter sentence of your comment is accurate; the former is not.

    • blastdoor
    • 1 year ago

    I’m interested to see how long it takes Wall Street to figure out the implications of this. The rest of this year might be great for Intel, but sometime in the 2019-2020 timeframe, Intel’s margins are going to come under non-ignorable pressure — possibly falling below 50%. Certainly that doesn’t mean Intel is doomed or going bankrupt or anything hyperbolic like that. But it will mean a big hit of the stock price.

      • Vhalidictes
      • 1 year ago

      The implications are that keeping manufacturing leadership is going to be more and more difficult over time.

      Which means in turn that AMD will get closer and closer to Intel’s silicon performance. Now this won’t translate directly to CPU performance as design plays a big role (see: Bulldozer), but it will bring overall performance closer together.

        • ronch
        • 1 year ago

        In any field of technology sooner or later everyone hits the wall and that levels the playing field like nothing else.

          • Mr Bill
          • 1 year ago

          Pink Floyd for example?

      • Gadoran
      • 1 year ago

      What about AMD margins under pressure ?? Nearly half of the profit goes to GloFo.

      Hard times for both as manufacturing becomes more expensive.

        • blastdoor
        • 1 year ago

        AMD never had 60 percent margins.

        • NoOne ButMe
        • 1 year ago

        Pure played Foundries margins, despite being up towards 50-60%, still manages to produce parts near or better than Intel’s products.

        Ryzen is selling a larger die, with more transistors, from a pure play found and has near 50% margins. Which is pretty close to Intel’s consumer division margins.

        Again, with much larger die sizes on Ryzen. ~210-215+mm^2 die for AMD’s to Zen die. Where Intel is <100mm^2 on smallest to close to 175mm^2 on high end.

          • chuckula
          • 1 year ago

          You start off your post about how wonderful foundries are and how much Intel sucks.

          Then the only facts in your post are basically showing how bad GloFo is at getting an 8 core non-IGP chip out on a “14nm” process where the chip is about 20% larger than an 8 core Coffee lake that *does* include an IGP. Not to mention the lack of clocks headroom.

          Something isn’t right.

            • Srsly_Bro
            • 1 year ago

            [url<]https://m.youtube.com/watch?v=e5JCp2Hd5L8[/url<]

            • NoOne ButMe
            • 1 year ago

            My point, which I did fail to state, is that foundry margin’s Are not causing AMD’s consumer CPU/APU facing margins to fall far under Intel’s CPU consumer margins.

            I would put it under GlobalFoundries need for customers, but they planned to expand production capacity on 14nm. So I think they have, or had, a capacity constraint.

    • blastdoor
    • 1 year ago

    Intel has replaced Moore’s Law with Zeno’s Paradox.

    No matter how many ++s are added to 14nm, it never becomes 10nm.

      • tipoo
      • 1 year ago

      Zeno 1: “Nani nani?”

      Zeno 2: “Nani Nani?!”

      [url<]https://www.youtube.com/watch?v=93DwmVFIONM[/url<]

        • steelcity_ballin
        • 1 year ago

        oWo *notices your 14mm chip*

      • Growler
      • 1 year ago

      You can’t [i<]add[/i<] to something to make it smaller! They should be using a 14-- process.

        • blastdoor
        • 1 year ago

        Doh!

        • Saribro
        • 1 year ago

        There’s a race-car corollary with Chapman’s vision:
        “Simplify, then add lightness.”

        • Eggrenade
        • 1 year ago

        Well, it should really be –14. You need to be careful with your pre- and post-increments, or you’ll get no benefit at all!

        • Mr Bill
        • 1 year ago

        Ah, incremental improvements via a decrement operator instead of an increment operator.

    • uni-mitation
    • 1 year ago

    [quote<] Whiskey Lake could include a long-rumored eight-core CPU for its mainstream sockets. [/quote<] Thanks to AMD for lighting that fire on their asses. Competition is always to the benefit of the consumer. Always happy to cheer for that! uni-mitation

      • blastdoor
      • 1 year ago

      Following whiskey lake will be cannabis lake, followed by opioid lake.

        • Aranarth
        • 1 year ago

        You forgot AMD, after Zen they have Poppy Fields! 😀

        • Ninjitsu
        • 1 year ago

        Acid Lake

    • chuckula
    • 1 year ago

    To the outside world, Intel presented a bright picture of profitability.

    But behind the scenes, things were falling apart.

    [cut to testimonial of DKanter telling a story about how he found Intel’s 10nm fab passed-out drunk behind a dive bar in Hillsboro]

      • Kretschmer
      • 1 year ago

      “Not quite as dominant” is still dominant.

      • uni-mitation
      • 1 year ago

      “Next, a special episode of ‘The Young & Fabless’ coming up!!

      uni-mitation

      • Srsly_Bro
      • 1 year ago

      Hillsboro is pretty nice. If this is the 10nm I think it is, it would have been found at the Sugar Shack on NE Killingsworth in Portland.

    • derFunkenstein
    • 1 year ago

    [quote<] Krzanich admitted to analysts that the company "bit off a little too much" with its aggressive 2.7x scaling target for the process compared to its 14-nm products.[/quote<] The laws of physics are, apparently, a bitch.

      • techguy
      • 1 year ago

      Depends on what you mean by that. Intel’s choice of multi-patterning on DUV increases the risk of error greatly compared to EUV. There’s still another node or two left for good ol’ silicon so I wouldn’t classify this as a “laws of physics” problem but rather one of complexity.

        • Mr Bill
        • 1 year ago

        Or, Entropy
        [quote<] There's still another node or two left for good ol' silicon so I wouldn't classify this as a "laws of physics" problem but rather one of complexity.[/quote<]

        • derFunkenstein
        • 1 year ago

        I just mean that they were feelin frisky and apparently over-confident. Nature then took its course.

          • Aranarth
          • 1 year ago

          Two Mantises mating? 😀

          • techguy
          • 1 year ago

          At this point 10nm is the new 90nm.

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