Single page Print

IDF Fall 2005: Intel aims for performance per watt

Intel aims for more performance per watt

IF THE THEME OF this past Spring's Intel Developer Forum was multi-core processors, the theme of IDF Fall 2005 was performance per watt. Not only did Intel announce a new, common processor microarchitecture that promises higher performance and lower power consumption than the current Pentium 4 and its derivatives, but the CPU maker also outlined a broad range of initiatives for reducing power consumption while boosting performance. Those initiatives are taking form in its next wave of products, its 65nm fab process, and in a number of cutting-edge R&D projects. I sat in on the major keynotes and a handful of sessions whose contents resonated with the overarching theme of better performance per watt, and my report follows.

Intel's new microarchitecture
We've already discussed the biggest news out of IDF, Intel's decision to move to a new CPU microarchitecture common to its mobile, desktop, and server product lines, and we've outlined some of the features of that architecture, including a 14-stage pipeline that's much shorter than the 31-stage monster in current Pentium 4 and Pentium D chips. This new CPU core will be a four-issue design, which means it has more internal parallelism than the three-issue designs in most current x86 processors, including the Pentium M, Pentium 4, and Athlon 64. Done correctly, this new core should achieve higher performance per clock and per watt than Intel's current CPU cores.

Intel has declined to give a name to this new architecture—at least so far—leaving us to wrestle with tortured references to "the new microarchitecture" and "this new design" from here to kingdom come. Rather than suffer through that, I have decided to give this microarchitecture a name myself. Henceforth, Intel's new microarchitecture shall be known as Fred.

Intel says Fred incorporates the best elements of both the Pentium 4 Netburst architecture and the Pentium M architecture. That's not a bad characterization of Fred, since Intel's current processors do share some technology between them, and Fred will no doubt incorporate some of that same tech. Discussions of chip heritage and the differences between an "all-new" design and a refinement of a past design are becoming ever more tedious as chip designs are increasingly modular. However, the best way to think about Fred is probably as an evolution of the Pentium M processor rather than as a clean-sheet design—not that there's anything wrong with that.

Fred will be well credentialed, with certifications in all of Intel's latest technologies (or, as Intel calls 'em, the *Ts), including VT for virtualization, LT for security and copy protection, and EM64T for compatibility with 64-bit software. Curiously, though, Fred will not incorporate one of the original *Ts, Hyper-Threading Technology. Intel says it still likes the idea of multithreaded execution cores and may bring it back in future designs, but I got the distinct impression that the current thinking at the company favors spending its transistor budget on additional CPU cores rather than on symmetric multithreading hardware. The problems that current dual-core Extreme Edition processors sometimes face with thread allocation among four front ends may also have factored into Intel's decision to pass over HT in the first implementations of the new architecture.

Unlike the Smithfield-based Pentium D processors selling today, Fred will feature a shared L2 cache and the ability to transfer data from one core's L1 cache to another's. The L2 cache size itself will be scalable as needed, depending on the application. In other words, mobile processors will likely get smaller caches than server processors. Among Fred's other talents will be deeper buffers, more L2 cache bandwidth than current designs, better prefetching of data into cache, and speculative loading of data from memory—also known as memory disambiguation.

Intel's new microarchitecture spans market segments (Source: Intel)

Fred will use the same bus as current Pentium processors, and its first implementations will drop into the same sorts of sockets as the processors it replaces. Merom is the code-name for the mobile version of Fred, intended for Socket 479. The desktop part, code-named Conroe, will come in an LGA775 package, and will have two versions that differ in terms of cache size. All of these chips will be dual-core parts manufactured on Intel's 65nm process. On the server front, Fred will have two incarnations at 65nm: a dual-core chip with 4MB of L2 cache known as Woodcrest, and a quad-core processor with 16MB of L2 cache code-named Whitefield. (Note to Intel: I stand ready to take delivery of my Whitefield-based Extreme Edition processor for review whenever you'd like to ship it.)

Intel expects much lower power requirements and thermal envelopes from these new desktop and server CPUs. Conroe's target TDP (its more-or-less maximum thermal dissipation requirement) is 65W, a very healthy dip from the 130W TDP of the Pentium Extreme Edition 840 processor. The company is also claiming twice the outright performance and 3.5X the performance per watt for Woodcrest and Whitefield over current Xeons. For mobile applications, Intel hopes to achieve a jaw-droppingly low 5W TDP for ultra-low voltage processors based on this same common architecture.

The path to the new architecture
Before Fred makes his auspicious debut, Intel will take several steps along the way, including the migration of its current CPU lineup to its 65nm manufacturing process and the introduction of a host of new "platforms," by which I mean mainly core-logic chipsets. We're already shown you pictures and descriptions of many of the processors, including Presler, which situates two 65nm Netburst cores on a single chip package.

Upcoming Intel platforms and processors (Source: Intel)

Notice that the mobile, sever, and workstations platforms for Fred-based processors will debut in early 2006, well before the new CPUs. That raises the distinct possibility that Merom and Woodcrest could act as drop-in replacements for the 65nm Pentium M and Xeon processors that precede them. Merom, in fact, is listed as a "Napa Refresh" in some Intel presentations. The picture is a little bit different for desktop platforms. The current 945/955 chipsets won't be replaced until the middle of 2006, and Conroe is slated to arrive either simultaneously or some time after that. Odds are that Conroe CPUs won't work in current 945/955 motherboards, although stranger things have happened, I suppose.